CPE 302: Syn and Verify using PDs
Section: 1001
Course | Section | Credits | Instructor | Dates | Status | Call Number |
---|---|---|---|---|---|---|
CPE 302 | 1001 | 3 (3 max credits) | Jul. 10, 2023 to Aug. 11, 2023 | Open | 53555 |
Description
Advanced methodologies in the design of digital systems. Hardware Description Languages (HDLs). Simulation, synthesis, verification of digital system designs using FPGAs. FPGA placement, routing, and timing analysis tools.Prerequisites
CpE 200 or CS 302 with a grade of C or better
Notes
This is an Internet class; refer to Canvas instructions at https://unlv.instructure.com.Summer Term registration policies are not the same as Spring and Fall. Failure to familiarize yourself with Summer Term registration policies and procedures may result in penalties. Courses must be dropped the business day prior to start date to avoid penalties. Visit the Summer Term website at summerterm.unlv.edu for complete registration and schedule information.- Drop Deadlines: 100% Refund: 7/7/2023 50% Refund: 7/14/2023 Last Day to Drop: 7/28/2023This data is for informational purposes only. Please see http://my.unlv.edu for a full catalog and more information.